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igd508e/igd515e data sheet & application manual page 1 intelligent gate drivers for igbts and power mosfets description the intelligent gate drivers of the igd type series are single-channel drive components designed for igbts and power mosfets. they were developed specifically for the precise and reliable driving and protection of high-power modules, high-voltage modules, series and parallel circuits. the igd508ei/en and igd515ei/en drivers are mutually pin-compatible and differ only in their driver power. the drive information and the status acknowledgement are transmitted via external fiber-optic links. the drivers contain an integrated dc/dc converter with a high isolation test voltage. special logic functions allow the implementation of reliable series circuits with igbts or power mosfets. product highlights applications 4 suitable for igbts and power mosfets 4 inverters 4 protect the power transistors 4 motor drive technology 4 extremely reliable, long service life 4 traction 4 high gate current of 1.5a to 8a 4 railroad power supplies 4 electrical isolation 4000 vac 4 converters 4 series connection functions 4 power engineering 4 monitoring of power supply and self-monitoring 4 switch-mode power supplies 4 switching frequency dc to mhz 4 radiology and laser technology 4 duty cycle: 0... 100% 4 dc/dc converter 4 fiber-optic links make long drive cables possible 4 research 4 shorten development time 4 rf generators and converters
igd508e/igd515e data sheet & application manual page 2 absolute maximum ratings parameter test conditions min max unit supply voltage v cc pin 10 to pin 9 -0,5 16 vdc logic input voltage all types (see note 5) 5vdc gate peak current i out igd 506ex pin 25 -8 +8 a igd 515xx pin 25 -15 +15 a test voltage (50hz/1min) inxx to output stages 7500 vac operating temperature igdxxxen 0 +70 c igdxxxei -40 +85 c storage temperature all types -45 +90 c pin designation pin desig. function 1 gnd power supply gnd 2 gnd power supply gnd 3 gnd power supply gnd 4 gnd power supply gnd 5 not present 6 not present 7 not present 8 not present 9 gnd power supply gnd 10 vcc power supply plus terminal 11 not present 12 not present 13 not present 14 not present 15 nc not connected 16 nc not connected 17 nc not connected 18 nc not connected pin desig. function 36 cq acknowledgement pulse capacitor 35 so status output signal 34 sdosa series-connected igbt mode 33 inv inverse input 32 input input signal from fol 31 +5v 5v power supply for fol 30 ignd gnd for fol 29 not present 28 not present 27 not present 26 not present 25 g gate driver output 24 com virtual common 23 cs blocking capacitor 22 e emitter / source 21 ref external reference 20 cb blocking time capacitor 19 me v ce measurement legend for terminal assignment : pins with the designation "not connected" are physically present but must not be connected to an electrical potential. pins with the designation "not present" are not physically present. the abbreviation "fol" stands for fiber-optic link.
igd508e/igd515e data sheet & application manual page 3 block diagram interface logic protection logic timing control vce monitoring voltage monitoring driver 25 20 21 19 30 33 32 31 22 +5v input inv ignd me g e cb ref 23 cs 24 co m 3 10 vcc gnd pwm controller igd508ex / igd515ex 4 gnd 9 gnd 2 gnd 1 gnd 35 so 36 cq 34 sdosa regulator +viso electrical isolation +viso 5v- fig. 1 block and connection diagram of the igd508e/igd515e
igd508e/igd515e data sheet & application manual page 4 mechanical dimensions layout overview (component side) grid 2.54 solder pads ? 1.6 drill holes ? 0.9 all dimensions are in mm fig. 2 mechanical dimensions and printed circuit layout case & coating component material case product noryl (ppe mod.), non-halogenate flame retardants coating mass polyurethane base, temperature-cycle resistant
igd508e/igd515e data sheet & application manual page 5 general characteristics quality standard manufacturing iso9001 certified reliability standard typ units mtbf igd508ex mil hdbk 217f (see note 12) > 2,000,000 hours mtbf igd515ex mil hdbk 217f (see note 12) > 2,000,000 hours thermal characteristics test conditions min max units operating temperature igd5xxen (see note 13) 0 +70 c igd5xxei (see note 13) -40 +85 c storage temperature all types -40 +90 c electrical characteristics power supply test conditions min typ max units supply voltage v cc (see note 1) pin 10 to pin 9 12 15 16 vdc supply current i cc (see note 2) without load 50 ma max. supply current i cc all types (see note 3 & 11) 450 ma output power dc/dc converter all types (see note 3 & 11) 6w efficiency hi nternal dc/dc converter 85 % turn-on threshold v th all types 10 vdc hysteresis on-/off (see note 4) all types 0.6 vdc coupling capacitance c io all types (see note 6) <10 pf logic inputs test conditions min typ max units max. input voltage v in all types (see note 5) 5vdc input voltage for logic "1" all types (see note 7) 3.8 vdc input voltage for logic "0" all types (see note 7) 0.9 vdc vce-monitoring test conditions min typ max units inputs me to e1/com -0.5 v cc vdc
igd508e/igd515e data sheet & application manual page 6 electrical characteristics (continuation) timing characteristics test conditions min typ max units delay time input to output turn-on t pd(on) (see note 14) 100 ns turn-off t pd(off) (see note 14) 100 ns delay time status output pin 35 (see note 16) 75 ns outputs test conditions min typ max units output current i out (see note 8) igd508ex pin 25 -8 +8 adc igd515ex pin 25 -15 +15 adc output rise time t r(out) (see note 9) all types 40 ns output fall time t f(out) (see note 9) all types 40 ns output current so all types pin 35 90 ma output voltage rating so all types pin 35 40 v output current +5v all types pin 31 30 ma electrical isolation test conditions min typ max units operating voltage (see note 10) continuous or repeated 2500 vdc test voltage (50hz/1min) (see note 17) 7500 vaceff partial discharge extinction volt. iec270 (see note 15) 2200 veff all data refer to +25c and v cc = 15v unless otherwise specified footnotes to the key data 1) at a supply voltage greater than 16v, the open-circuit voltages on the two output sides of the dc/dc converter may exceed 18v. this can lead to the destruction of the driver and protection circuits on the output side. 2) only internal consumption of the drivers, static. 3) if the specified power consumption is exceeded, this indicates an overload of the dc/dc converter. it should be noted that these dc/dc converters are not protected against overload. 4) the turn-off threshold is lower than the turn-on threshold by the magnitude of the hysteresis. the turn-on and turn-off thresholds allow the drivers to be run at operating voltages of 12v to 15v and cannot be changed. 5) this refers to the logic inputs input (pin 32), inv (pin 33) and sdosa (pin 34). 6) coupling capacitance of the dc/dc converter. 7) guaranteed logic level for the logic inputs input (pin 32), inv (pin 33) and sdosa (pin 34), of which only input (pin 32) has a schmitt trigger characteristic. 8) the gate current must be limited to its maximum value by a gate resistor. 9) at a load of 1 f in series with 2 ohm. 10) maximum continuous or repeatedly-applied dc voltage or peak value of the repeatedly-applied ac voltage between the power supply inputs and all other terminals. however, types that have been measured and selected for higher partial-discharge voltages are also available (see note 15). 11) the output power of the dc/dc converter is 6 w, of which about 1 w must be used for the drivers own supply and for the fiber-optic links. this leaves another 5 w for driving the power semiconductors.
igd508e/igd515e data sheet & application manual page 7 however, some fols require even more power, in which case the power available for driving is reduced. 12) the mtbf (mean time between failures) is calculated to mil hdbk 217f at an ambient temperature of 40c, a typical load and when the driver is exposed to a current of air. further information on reliability may be obtained from concept upon request. 13) the application-specific self-heating of the drivers - especially at high load - must be taken into account. 14) transit time from pin 32 (input) to pin 25 (g) only within the driver, without external fiber-optic links. 15) the partial discharge is not measured for the standard types. for main power applications, a sufficient safety margin exists between the typical operating voltage of < 600vdc and the partial discharge extinction voltage of typically about 1500 vpeak. tested and selected types with guaranteed partial-dis- charge immunity can be supplied for applications with maximum requirements and higher operating voltages (such as railroad applications). 16) transit time from a turn-on or turn-off edge of the input signal at pin 32 (input) to the first edge of the acknowledgement at pin 35 (so) only within the driver, without external fiber-optic links. the transit time to pin 35 (so) within the driver after a protection function responds is even shorter. 17) the test voltage of 7500 vac(rms)/50hz may be applied only once during a minute. it should be noted that with this (strictly speaking obsolete) test method, some (minor) damage occurs to the isolation layers due to the partial discharge. consequently, this test is not performed at concept as a series test. in the case of repeated isolation tests (e.g. module test, equipment test, system test) the subsequent tests should be performed with a lower test voltage: the test voltage is reduced by 750v for each additional test. the more modern if more elaborate partial-discharge measurement is better suited than such test methods as it is almost entirely non-destructive. functional description overview the intelligent drivers of the igd series are universal drive modules designed for power mosfets and igbts in switching operation. the igd508e and igd515e types are mutually pin-compatible and differ only in their maximum gate currents. the igd types with higher gate currents are eminently suited for large modules or for a number of transistors connected in parallel as well as for high-frequency applications (due to the thermal stress in the final stages). in conjunction with a pair of fiber-optic links (fols), the intelligent drivers of the igd series represent a complete solution for all driving and protection problems associated with power mosfet and igbt power stages. almost no other components are required in the control circuit and in the power section. reliable operation gate driving with a positive and negative control voltage (between 12v and 15v depending on the selected supply voltage) allows reliable operation of igbt modules of any size from any manufacturer. thanks to the great interference immunity attained by means of the negative gate voltage, a number of power mosfet or igbt modules can be connected in parallel without the user having to worry about parasitic switching operations or oscillations.
igd508e/igd515e data sheet & application manual page 8 the components contain an overcurrent and short-circuit protection circuit for the power transistors, a feed monitoring function, a status acknowledgement, a mode for brake operation, a mode for series and parallel circuits as well as an electrically-isolated supply for the drive electronics via an integrated dc/dc converter. genuine electrical isolation the outstanding electrical isolation of up to 2500 v operating voltage (corresponding to a test voltage of 7500 v) between the control and power sections predestine these drive modules for applications in which large potential differences and large potential jumps occur between the power section and the control electronics. the design of the dc/dc converter allows operation with two 1700v-igbts connected in series, for example. (higher isolation voltages upon request.) application benefits reliable power stages can be realized with power mosfets or igbts within an extremely short time by using these driver modules. the high drive power allows simple driving of the largest power semiconductor modules and parallel circuits. the high isolation-test voltage allows high-voltage igbts and series-connected transistors to be driven. the integrated dc/dc converter allows a simple power-supply concept: a single 15-v feed is sufficient to supply any (large) number of drivers. the short transit times of the drivers of the igd series - in conjunction with broadband fiber-optic links - also allow them to be used in high-frequency clocked power supplies, rf converters and resonance converters. these drivers have been manufactured by concept on the basis of many years of experience in producing intelligent drivers for power mosfets and igbts and represent a further development of the drivers of the ihd series that have already been tried and tested in large quantities. short-circuit and overvoltage protection one of the basic functions of the intelligent drivers of the igd series is to ensure reliable protection of the driven power transistors against overcurrent and short circuit. the current measurement is based on determining the drain-source or collector-emitter voltage at the turned-on transistor. after a threshold defined by the user has been exceeded, the power transistor is turned off and remains blocked in this condition for a defined minimum time (in normal mode). when this time has elapsed, the transistor is released again. this protection concept can be used to protect igbts simply and reliably without the need for additional components in the power path.
igd508e/igd515e data sheet & application manual page 9 layout of the terminals the terminal pins of the drive modules in the igd series are configured so that the layout can be kept simple. a spacing of 45 mm is maintained between the supply pins and the power potential! note in the following, the abbreviation "fol" will be used for the term "fiber-optic link". this refers to a component of an fol connection, such as a fiber-optic transmitter, a fiber-optic receiver or the entire fol connection consisting of the fiber-optic transmitter, fiber-optic wire and fiber-optic receiver. pins 1,2,3,4,9 and 10 gnd and vcc these pins are used for the power supply of the driver module. the nominal feed voltage is between 12 v and 15 v. to ensure reliable starting of the integrated dc/dc converter, a switching-resistant and low-inductance electrolytic capacitor must be placed in the immediate vicinity of pins 9 and 10. the capacitance of this capacitor must not be less than that of the capacitor connected to cs (pin 23). the current consumption of the dc/dc converter is determined by the number of driven transistors, their gate capacitance and by the clock frequency. thanks to the high isolation of the feed terminals with respect to all other pins, the drivers of the igd series can be supplied by a potential of any size. the internal turn-on thresholds are designed so that 12-v operation is also possible. this is particularly useful for operating transistors that have very high short-circuit currents at higher gate voltages (low saturation types). it should be noted that the drivers themselves are not protected against self- overload. a short circuit between the gate and the emitter terminal, caused by a defective power semiconductor, for example, can lead to thermal destruction of the driver. pin 25 - output gate pin 25 is the driver output for driving the gate. driving is from 12 v to 15 v, depending on the supply voltage, but also without a negative gate voltage depending on the application and the power transistors used (see description of pin 24, com). the output stages of the drivers of the igd series are very ruggedly dimensioned. the maximum permissible gate charging current is 8 a for the igd508ex and 15 a for the igd515ex; this allows the largest igbt and power mosfet modules to be driven. a number of power modules connected in parallel can also be driven directly. the charging current must be limited by an external gate resistor. it should be noted that when the gate is driven with a voltage, the total voltage rise (twice 12 to 15 v) must be considered. the gate of the power transistor must be connected to pin 25 by means of a lead of minimum length. a gate circuit with two gate resistors and a diode can be used to set the switching speeds at turn-on and at
igd508e/igd515e data sheet & application manual page 10 turn-off independently of each other (see fig. 3). it is mandatory to connect zener diodes immediately between the gate and emitter for igbts (connected in anti-series). their zener voltage must correspond exactly to the selected gate voltage (12 v to 15 v) (see fig. 3). they prevent the gate voltage from increasing due to parasitic effects (such as the miller effect) to a value that is higher than the rated gate voltage. an excessively high gate voltage increases the short-circuit current to an overproportional extent and can lead to destruction of the power semiconductors. a sufficiently low-resistance termination of the gate is also ensured by the driver module when this is not supplied with the operating voltage. pin 22 - emitter terminal this pin should be connected to the emitter or source terminal of the power transistor. the connection must be as short as possible and must run directly to the emitter or source terminal of the power element. this pin should be used for modules with an auxiliary emitter or auxiliary source. it is also used as a basis for the reference, that should be connected as directly as possible to pin 22 of the driver module. if the connections between a driver of the igd series and a power transistor are set up via connecting leads, then these should not exceed a length of 10 cm. the leads for the gate, emitter and the measuring pin (collector or drain terminal) should be run to each transistor in twisted form. pin 19 - terminal me this pin is used to measure the voltage drop at the turned-on power transistor in order to ensure protection against short circuit and overload. it should be noted that it must never be connected directly to the drain or collector of the power transistor. to protect the measurement terminal from the high drain or collector voltage of the turned-off power element, a circuit with a high-blocking diode (dme) or several diodes of the 1n4007 type connected in series should be included (see fig. 4). it is absolutely recommended to overdimension these diodes in terms of voltage. a pull-up resistor integrated in the driver module ensures that a current flows through the measurement diode (dme), the attenuation resistor (rme) and the power transistor when the latter is turned on. a potential is then present at the measurement input me that corresponds to the forward voltage of the turned-on transistor plus the diode forward voltage and the voltage drop at rme. rme igd508e/igd515e 25 22 g e fig. 3 asymmetrical gate resistors
igd508e/igd515e data sheet & application manual page 11 attenuates the reverse-current peaks of the measurement diode dme and should have a value of 68 ohm. it should be noted that the power tran- sistors do not turn on immediately. it can take several microseconds for them to switch through fully, especially with igbts. together with the integrated pull-up resistor and the external capacitor (cme), this produces a delay in the measurement after the power transistor has switched on. this delay shall henceforth be known as the response time. this response time (and thus cme) must be selected to be greater in inverse proportion to the speed at which the power transistors turn on. the formula for dimensioning cme is given on page 17. it should further be noted that negative voltages are not permissible at the measurement input. pin 20 - terminal cb after the current monitoring circuit responds, an error message is reported via the status output so during a defined time - known henceforth as the blocking time. in normal mode (see pin 34 (sdosa)), the power transistor is also turned off by the intelligent drivers protection function and remains in this state during the blocking time (see fig. 5). this function is used to protect the component from thermal overload at a continuous or repeated short circuit. the blocking time can be determined by connecting pin 20 (cb) to pin 24 (com) via a capacitor (see page 17 for the formula). the capacitance of the blocking capacitor should not exceed a value of 470 nf. after the blocking time has elapsed, the power transistor is immediately released again. pin 21 - terminal ref an external zener diode is connected to this pin as a reference. this defines the maximum voltage drop at the turned-on power transistor at which the protective function of the drive circuit is activated. the protection functions of the intelligent drivers of the igd series always become active when the voltage at me (measurement drain/collector) is higher than that at ref (see figs. 4 & 5). the reference potential is the emitter (or source) of the power transistor. the reference must never under any circumstances be capacitively blocked. the reference diode should be placed as closely as possible to the driver module. pin 23 - terminal cs a switching-resistant and low-inductance blocking capacitor (an electrolytic dme rme igd508e/igd515e cme 22 e 19 me 21 ref 1k5 1k5 dref com vcc vcc measuring overcurrent fig. 4 principle of v ce monitoring
igd508e/igd515e data sheet & application manual page 12 capacitor is usually used) is connected at this output. it decouples the dc/dc converter on the secondary side. the capacitor must supply the pulse currents (up to 8 a or 15 a) for charging the gate capacitances. the electrolytic capacitor is connected between cs and com. since the charging currents for the gate capacitance are drawn mainly from this electrolytic capacitor, it must definitely be located as closely as possible to the driver module. the terminal assignment is optimally suitable for this purpose. a capacitance up to 250 mf is recommended. significantly greater values should not be used in order to guarantee problem-free starting of the integrated dc/dc converter. in order to prevent the operating voltage from ?running up on the secondary side, a 16-v zener diode or a transient suppressor must be connected in parallel to the blocking capacitor. this diode should be designed for a power loss of at least 1.3 w. pin 24 - terminal com this is the ground pin of the secondary- side blocking capacitor. it is used at the same time as the reference potential for the measuring filter and the capacitor cb. the com terminal can be connected to the source of a power mosfet in place of e. the anode of the reference diode must then also be connected to this pin. this circuit allows power mosfets to be overcurrent turn-off threshold 0v -15v 0a 0v +15v +5v blocking time tt 1 0 status acknowledgement output load current gate voltage (pin 25 to pin 22) input voltage at pin 32 t = power-transistor turn-off in case of overcurrent t - t =blocking time (all input signals are ignored) 0 1 0 0v (0=light on; 1=light off) fig. 5 principle of the protection function and the blocking time
igd508e/igd515e data sheet & application manual page 13 driven without a negative gate voltage. the transistor is then driven in the turned- off state with 0 v (unipolar gate driving, see fig. 6). the terminal e is not used in this circuit and must never under any circumstances be connected to com. this method of gate driving is not as a rule useful for igbts, as a negative gate voltage should always be used for larger modules. pin 30 - terminal ignd this is the ground pin for the interface electronics, specifically for the fol receiver (see fig. 7). pin 31 - terminal +5 v a voltage of +5 v with respect to ignd is applied to this pin. it is designed to supply the interface electronics, specifically the fol receiver (see fig. 7). the maximum current of 30 ma for this output must not be exceeded. most receivers require less current. if an fol receiver that requires more than 30 ma is used, then an external 5-v controller should be connected. it can be supplied by pin 23 (cs). pin 32 - terminal input the output signal of the fol receiver is applied to this input (see fig. 7). in principle, this component may be obtained from any manufacturer. for high-quality applications, however, suitable fol products should be used; concept is happy to advise its customers on this point. examples of suitable fol receivers are: hfbr2521 and hfbr2522 (from hewlett-packard) as well as sfh551v and sfh551/1v (from siemens). as the familiar fol receivers supply a 0 v signal when the drive information is applied (i.e. when current flows through the fol receive diode), this input is suitably designed. a 5-v signal corresponds to the status of ?power semiconductor turned off; a 0-v signal to that of ?power semiconductor turned on. however, the latter output status is possible only when the protection function has not responded in normal mode (see pin 34, sdosa). the input terminal has a schmitt trigger characteristic in order to attain a high signal-to-noise ratio. the logic function of the input terminal can also be inverted by pin 33 (inv). dme rme cme 24 com 19 me 21 ref dref rg 25 g pin 22 (e) is not used fig. 6 unipolar gate driving (0/+15v)
igd508e/igd515e data sheet & application manual page 14 pin 33 - terminal inv this pin allows the input signal input to be inverted. this input is normally connected to ignd. a 5-v signal at the input terminal then corresponds to the status of ?power transistor turned off and a 0-v signal to that of ?power transistor turned on. if inv is connected to +5 v, then precisely the opposite is true. the input inv allows connection of an fol receiver with a ?high or ?low output signal in the driven status. however, this function is used particularly frequently in drives with brake choppers. the status of ?current in the fol transmit diode then means ?brake chopper turned off. turn-off or absence of the drive signal then activates the brake. pin 34 - terminal sdosa this pin is used for mode selection and affects the reaction of the protection function. in normal operation, the sdosa terminal (pin 34) remains open. this has the effect that when a fault (in the desaturation or supply-voltage monitoring circuits) occurs, the power semiconductor is immediately turned off, even if the input signal continues to be applied. the fault status is simultaneously reported to the control electronics via the status output so. the second operating mode is designed specifically for the series connection of power mosfets and igbts. for this mode, the sdosa input is connected to +5 v. this now has the effect that when an error (in the desaturation or supply- voltage monitoring circuits) occurs, the power semiconductor is not turned off. the status output so merely reports the error status to the control electronics, which must now centrally turn off all the drivers simultaneously as quickly as possible. this is the only way of ensuring the symmetry in the series circuit even if a protective function is triggered. the same function can also be used if several power semiconductor modules are connected in parallel, each with a separate driver. in this case, the symmetry of the current distribution is retained by the simultaneous turn-off of the drivers. the driver thus allows any combination of series and parallel circuits of power mosfets or igbts. this function can also be used in bridge circuits, for example to ensure that all power semiconductors are turned off simultaneously in the case of a fault. in each of these cases it is important that linking the status acknowledgements in the event of a fault produces a turn-off of all drive pulses as quickly and directly as possible. the term direct here refers to the signal path: the linkage should be 30 32 31 +5v input ignd 2 3 4 1 vcc gnd r v l o hfbr-2522 100nf fig. 7 fiber-optic receiver wiring
igd508e/igd515e data sheet & application manual page 15 realized within a single pal or fpga and not by a complex circuit structure or a microprocessor. fpgas with suitable programming may be obtained from concept upon request. pin 35 - terminal so this is the status output of the driver. an fol transmitter for the status acknowledgement is connected to it via a dropping resistor (see fig. 8). the supply voltage should be obtained from pin 23 (cs). a voltage of about +15 v is present here. the status output so has the following statuses: if the supply voltage is too low, then the fet at output so is through-connected. this means that no current flows through the fol transmitter. if the supply voltage - but no error status - is applied, then the output so is high- impedance. this means that a current flows through the fol transmitter of the status acknowledgement circuit. after the protection function (desaturation monitoring) of the driver has detected an error status, the output so is through- connected for the duration of the blocking time. the error status is thus reported to the control electronics (see fig. 5) this output also acknowledges every switching edge of the driving signal with a short pulse, during which the fet becomes conducting (see fig. 5). the length of the acknowledgement pulse is determined by connecting pin 36 (cq) to a capacitor. the acknowledgement function allows the control electronics to monitor the operation of both fol connections (i.e. the drive wire and the status acknowledgement) as well as the driver. if the acknowledgement pulse fails to appear, then the fol drive connection has probably failed. fol connections that are incorrectly plugged in and transmit diodes whose luminous power is greatly reduced due to degradation effects often show the following extremely dangerous effect: the receiver emits a high-frequency noise signal in the megahertz range. this leads to thermal destruction of a power semiconductor and possibly also of the driver within microseconds. an acknowledgement pulse is then present at the so output with every edge of the input signal. a defective status can be detected by a suitable logic circuit in the control electronics and the system can be turned off. concept can supply fpgas with these functions upon request. it is further recommended that the status acknowledgements are not connected together in the form of a summed 30 ignd 35 so 23 cs +viso 1 2 fig. 8 fiber-optic transmitter wiring
igd508e/igd515e data sheet & application manual page 16 message, but are evaluated as individual signals in a monitoring logic circuit. this significantly simplifies diagnosis and troubleshooting in the event of a fault. pin 36 - terminal cq the length of the acknowledgement pulse at the output so is determined by a capacitor at this terminal connected to pin 24 (com). the length of this pulse can then be optimally determined for each application (depending on the throughput rate of the fol connections and the clock frequency). a capacitor of 470 pf at terminal cq produces an acknowledgement pulse of about 1 s. if no capacitor is connected to terminal cq, then the acknowledgement pulse is only about 30 ns in duration. unless the fol connection in the status acknowledgement circuit is extraordinarily fast, an acknowledgement signal is no longer visible at the receiver. this operating mode can be selected when monitoring of the fol connection is not desired. in principle, however, operation is recommended with the acknowledgement monitoring function. configuration of the power section the intelligent drivers should be placed as closely as possible to the power transistors. the connection leads to the transistors should be as short as possible, i.e. not more than 3 to 10 cm in length depending on the gate current and switching speed. in contrast, the fol input leads can be of practically any desired length. +15v gnd + 250uf 5,6 dm01 1n4007 rm 68 + cs 250uf ds 16v cb 330nf cm 5n6 ref 7v5 15v 15v dm02 1n4007 igbt: siemens bsm300ga170dn2 1 2 hfbr-1522 2 3 4 1 vcc gnd r v l o hfbr-2522 100nf dm03 1n4007 470 e 22 g 25 ignd 30 inv 33 me 19 com 24 cs 23 ref 21 cb 20 sdosa 34 so 35 +5v 31 input 32 gnd 1,2,3,4,9 vcc 10 cq 36 igd508ei/en 470p fig. 9 application example: driving a 1700v/300a igbt with igd508ex
igd508e/igd515e data sheet & application manual page 17 application example with a 1700 v/300 a igbt fig. 9 shows an example circuit with a bsm300ga170dn2 from siemens. the optical-waveguide components hfbr- 1522 and hfbr-2522 are from hewlett- packard. pin 34 (sdosa) is open, so the driver is in normal operation. this means that it turns the igbt off in the event of a fault. pin 33 (inv) is on ground, so the signal transfer is non-inverting. the capacitor at pin 36 (cq) generates acknowledgement pulses of about 1 s. the response time with cme=5n6 and ref=7v5 is about 7 s. the response threshold is about twice the rated current. this example should give you some initial idea. the exact dimensioning should be checked critically in every application. evaluation boards completely assembled and tested multiphase igbt inverter bridges from 10 kw to about 1 mw are currently available. in conjunction with the documentation, these boards can be used to set up operational prototype equipment within a matter of hours. formulas for circuit calculations response time capacitor t a c me = v cc 1,5k w ln ( ) v cc - v ref blocking time capacitor at 15v gate driving t b c b = 71,6k w c b max = 470nf at unipolar gate driving (=/+15v) t b c b = 2 v cc 100k w ln ( ) v ref c b max = 470nf supplementary services concept makes the practical experience gained over many years by its develop- ment and application engineers available to all interested users. concept offers various services within the scope of this offer:
igd508e/igd515e data sheet & application manual page 18 consulting and training concept provides consulting and train- ing services to customers on optimal procedures, the ideal circuit topology and the avoidance of possible difficulties in the development of power electronics. technical support concept offers you fast and effective help for your questions and problems: e-mail: concept@bielstar.ch tel ++41 (0)32 / 322 42 36 fax ++41 (0)32 / 322 22 51 application concept calculates and dimensions power sections and driver circuits accord- ing to the customers specifications and supplies complete circuit diagrams, parts lists and electrical and thermal key data of the circuit. the customer then implements the layout and construction of the equip- ment himself. customer-specific systems concept develops and produces com- plete equipment and systems according to the customers specifications. quality the obligation to high quality is one of the central features laid down in the mission statement of ct-concept technology ltd. total quality management (tqm) covers all stages of product development and production up to delivery. the drivers of the ihd series are manufactured according to the iso9001 quality standard. exclusion clause concept reserves the right to make modifications to its technical data and product specifications at any time without prior notice. the general terms and con- ditions of delivery of ct-concept technology ltd. apply.

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